Fig. 3

Decoding of vertical layout. An example is shown for the first two cycles of serial decoding of the vertical layout from a block packed with a bit width of 6. Shaded regions correspond to the values in Fig. 2b. Source code is shown in part (f), with key steps shown graphically in parts (a) through (e). a Loading of the first 128-bit vector from the block. b Masking of the first four difference values from the vector. c, d Shifting and masking of the second four difference values from the vector. e Parallel addition of the first and second vectors of difference values. f Source code in the C language. Comments in the source code correspond to the steps labeled a through e